Issue about the transistor sizing of the last stage for loading pin capacitance in high frequency

 Hi,

I am designing padframe of the technology IBM7RF on IC614. Since my circuit will have a output signal at 1 GHz, I have to consider the capacitance from chip package to PCB which could be over 100pF while designing the transistor size of the last stage.  So far from simulations it seems quite impossible to load such big capacitance with a high frequency output signal as much as 1GHz, no matter how big the transistor size is. Do I misunderstand anything? Thanks in advance.

Best regards,