Hi All,
I am trying to plot the variation of the equivalent output capacitance of a FET when the input DC gate voltage is swept from 0 to 2V. First, I connected a DC voltage source with a parametric value of Vg to the gate and another DC source with AC amplitude equal to 1V and DC voltage of VDD to the drain. Then, I run AC simulation with dc sweep and plotted mag(Id/(2Pi*f*Vac) to see the total output capacitance. In the second approach, I used a port connected to the drain with the DC voltage of Vdd and swept the gate voltage in the input. Here, I run SP simulation and plotted Imaginary of the output admittance Y22 divided by 2*Pi*f. I think both approaches are correct and I should see the same behaviour, however, I see two different characteristics. Does anyone know where I made mistake and which approach is reliable?
Cheers,
Hossein