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oscillator jitter measurement(jc , jcc)
Hai sir, I am simulating the LC VCO at a free running frequency of 5GHz. PSS settings: Beat frequency - 4.5GHz, number of harmonics - 10, tstab=100npnoise settings: pss beat freq - 4.5GHz, sweep...
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How to UN-SELECT the noise contribution of a modeled instance with Verilog-A...
Dear All,I have some transistors in my PDK whose model file contains Verilog-A (.va) noise source .So when I try to make these Transistor's Noise OFF in Spectre (MMSIM14) option, the noise coming...
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Issues with Noise SUMMARY FORM in cadence-IC5141
Dear All,Can any body please tell what is the use of Include Instances & Exclude Instances options in Noise Summary form.When I don't fill any of these these two options, I am able to see all the...
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Changing a parameter in the PDK model file using Variable in ADE
Dear All,I have a parameter "hfnoise" in my PDK model file. It takes some values which can be changed by creating a variable "hfnoise" in ADE.I am adding the variable "hfnoise" into ADE. But the value...
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How PORT in analogLIb of Spectre Works
Dear All,I want to know the inside netlist of the port present in analogLib ( the exact way it evaluates the signal ).Can anybody please tell where I can gest this information from ?Kind Regards,
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Large Signal Y-Parameter or S-parameter
HiI need to find large signal Y-parameters of a 2-port network such as a common source amplifier, in Cadence.Has anyone done something successful in this regard, please help me with it. Once I tried...
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Inductor Flattening
So, I am using gpdk045 (ind_a) and when I was faletting my ind_a layout cell, I came across this warning -*WARNING* (BND-2005): Layout instances and terminals do not match the source.Use 'XL Status' in...
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About ports
Lets say that you have a two port network.If the output port isn't matched to 50 Ohms, is it still safe to use output port resistance as 50 Ohms and get ZM2 ?Secondly , if the output isn't matched,...
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LVS error for inds
So I was running LVS and RCX on circuit with gpdk045 (version 4.0).I encountered following error :
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ASSURA RCX FAILS
Hello,This is kind of urgent. I am using IC615 with LFoundry. After successfully running DRC and LVS, RCX fails with the following error. I don't know how to upload any file so I am pasting...
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Error in simple schematic after including bondpads
Hello,I am using IC615 with LFoundry. I was easily simulating my design but when I added bonpads, I got the following errors. Any suggestion of why they are appearing?Cadence (R) Virtuoso (R) Spectre...
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Schmitt trigger without hidden states in VerilogA
Hello,I would like to model with verilog A a fully differential Schmitt trigger, to be used in a pss.It's a very simple code. At the initial step, the threshold is set to the right value, depending on...
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ac and transient simulation in s domain
suppose a transfer function block is defined in s-domain(Laplace), now ac simulation is possible but I want to know transient analysis is possible using the same block.Or How one can do both ac and...
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RMS Jitter From Phase Noise
I am trying to convert Phase Noise to RMS Jitter(radians), but I'm having trouble following the units through the process.To get RMS Jitter, in radians, from Phase Noise you must integrate the Phase...
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How to use MOSFET as a switch to introduce a capacitor into a LC tank in VCO?
Hi guys,In my VCO design, if I introduce a fixed capacitance, Cap_fix into the C tank, it works fine and give me the target frequency I want. If I disconnect this path (in parallel with the total C) to...
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Which way of getting the target fundamental frequency is correct after...
Hi,I have two ways of getting the fundamental frequency if I am not wrong.1. I use the provided plot fundamental frequency in the RF manual and get a equation. Something like this: (L0 is the inductor...
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Huge performance difference between using the ideal inductors and the...
Hi,In my VCO circuit, I want to do a layout. Anything comes from analog lib does not have layout view, like 'ind' 'cap'. When I replace the device of 'ind' by the 'spiral_std" (while keeping the...
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Time Varying Noise - Whitepaper
I was reading whitepaper on time varying noise (cyclostationary) and something odd struck me :Quoted from page 5 , step 8 from white paper To calculate time-varying noise power, bring up the Direct...
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Anyone knows about how much variable capacitance is present under how much...
Hi,I noticed the description for device 'nmoscap' is NMOS in N-Well varactor and there are two fields:CapValue_(F): variable_a FCapValue@0V_(F): variable_b FIt appears clear that variable_b means...
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Noise figure simulation of LNA in presence of transient signals
Hello,I have been computing noise figure of a low noise amplifier by running s-parameter simulation. In this I mimic the DC operating point of my circuit by means of supplying external voltage sources...
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