How are layout cells for top and bottom layers handled in Microwave Office?
Hello, all of our layout cells are designed using the copper layer "Cu_1", which is the top layer of copper on the circuit board.If I want to reuse a layout cell on the bottom ("Cu_4"), do I have to...
View ArticleCan microwave office automaticly add component id's
Hello, we have been manually drawing component id's on the silkscreen layer with the text tool (like, C1, C2, L1, L2, C3, C4, R1, C5. . .)Is there a way to make it use the component ID and...
View Articletimeaverage and sample(jitter)
Hi there,I am trying to understand the difference and correlation between timeaveraging and sampled jitter method.For sampling jitter, it calculates noise at particular threshold point. And for time...
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Loadpull Simulation issue using portAdapter and the inherent Loadpull option...
Hi,I have been trying to use the portAdapter from the rfExamples lib to sweep my load impedance. I run into issues there. Please check the image below : For gamme=0.6, and phase=90deg, the output log...
View ArticleAM simulation with hb+hbac
Hi,I am very new to Cadence and been trying to set up a quite simple simulation without success. I am trying to simulate an envelope detector (AM demodulator), where I feed a double sideband AM signal...
View ArticleNoise measurement for a circuit containing VCO and MIxer
I have a single receiver circuit which has both a VCO and a mixer (from supply to gnd). I need to simulate Noise figure of this Receiver. Please let me know the correct simulation setup.This is what is...
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PSS does not converge if initial condition is set
When I simulate a divider as shown in the circuit diagram below, I find that if I don't give the initial state of the circuit shown in the diagram, the circuit doesn't achieve its function("1" for...
View ArticleLVS fails after partial layout extraction with EMX
Hi,I am trying to implement a design flow where I can simulate parts of my circuit with EMX (e.g. an instance of a custom made inductor), and the remaining parts with parasitic extraction. For this I...
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Difference between cds and cdsbo(or cgs & cgsbo) in DC Operating Point
The DC Operating Point of a NMOS is shown below. I want to know the parasitic capacitance of the NMOS. But there are cgs, cgsbo, cds and cdsbo. cds equals cdsbo while cgs does not equal to cgsbo. So...
View ArticleHow to calculate phase noise from transient noise run of an RC oscillator
Hi, we have quite a noisy osc for app. 65MHz, and we are not sure if pss and pnoise results are 100% correct (like using lorentzian setting or not). So we run a long tran noise simulation, and can e.g....
View ArticleLow Priority wish list for AWR/MWO...
I do not know if this is the correct forum for low priority wish list...With MTRACE2, we can route traces around without changing total physical length. We can choose method of MBEND used...
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Comparing Transient Noise, Pnoise, and Pnoise with Lorentian approximation of...
I am investigating a ring oscillator (cmos inverters in chain) for its close-in phase noise. My understanding is that the Lorentian spectrum is supposed to approximate the phase noise PSD at small...
View ArticleLoadpull at second harmonic using portAdapter
HiWhat is the procedure to do loadpull at second harmonic by providing a resistance at first harmonic and short at other harmonics using portAdapter? Is there any other way to do the same?
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HB 2-tone puzzling results - Some basic understanding missing?
EDITED with results from QPSS on the bottomHI,I am doing some basic analyses on a very simple sampling structure and I am having issues getting the same results with TRAN and HB.I have tried multiple...
View ArticleCalibre Quantus for RC extraction of varactors
Hello to the community,I am trying to do a PEX for some varactors that I have in my design, and the post layout simulation results are weirdly inaccurate. I feel like the Quantus tool disregards my...
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AC Noise : inductors and noiseless ports still making noise
Hi,I am exploring noise simulation capabilities and I stumbled upon something that looks strange to me, namely that when I list the noise contributors for a certain circuit containing ideal inductors...
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AC Noise : NF from output noise values
Hello again There is another thing I would like to understand about how the simulator works in this instance, but I'll keep it separated from the "buggy behaviour" I just wrote about.From the Manuals,...
View ArticleClarity 3D - Dielectric materials model selection
In a microelectronics (packaged RFIC or SoC) context, what dielectric model would you advise or recommend to use in Clarity 3D? All dielectric materials are of Dispersive type (Piecewise Linear when...
View ArticleFrequency Converter Swept Measurements - AWR VSS
Hi, I am trying to obtain frequency-swept Gain and Group Delay plots through a frequency converter modeled in VSS. I have set up a VNA block with the FSTART, FSTOP, FSTEP specified as input (stimulus)...
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AWR VSS - Discrepancy between Time Domain Simulator & Budget Analysis in...
Hi, I have an AMP_B block that I'm driving into saturation, and I'm noticing around a 4 dB difference in compressed stage output power depending on if I use the Time Domain Simulator (measured with...
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