No options are shown in Cadence Virtuoso ADE: after dc analysis.

Results> Print> no options are highlighted

During spectre simulaiton, I am working in an RF model where I have to select the the netlist based on the port that is selected and pass as a parameter.

Can I do this with an if statement (I can do it in hspice).

A brief example

subckt testme n p
parameters port="m3" m3="m3" m1="m1" m2="m2"
if(port == m3) {
parameters a=30
parameters c=100f
} else if(port == m2) {
parameters a=20
parameters c=100f
} else {
parameters a=10
parameters c=100f
}
r1 n np resistor r=a
c1 np p capacitor c=c
ends testme

Appreciate the help

Hi

In out lab whenever we use Sweep in Cadence Virtuoso the result we get is TOTALLY different compared to the case that we simulate point by point.

It has happened to all of us, both with transient and PSS simulations such that we do not use Sweeping tool anymore! Therefore we cannot find an optimum point with the help of sweeping.

Does anyone know anything about this issue?

Our MMSIM version is 11 so it is old, but has this been a problem with old versions?

Best

Hamid

Hello,

I am a student, and new to Cadence and SpectreRF. I need to the determine the EVM introduced by outphasing PA's in case of 256-QAM, preferably by using a fast envlp analysis (instead of a much slower transient analysis).

First, I did some envlp and EVM simulations by using the standard 802.11.bin files (from rfVsource ) as baseband sources combined with the EVM function, the results were as expected, but the maximal constellation size in this case is 64-QAM.

So I tried to extend this to 256-QAM, but since I could not open these .bin-files, I used pwl sources as I/Q sources, and (longer) pwl files which I made in Matlab, by baseband filtering the symbols with a square root raised cosine pulse. Now, I try to determine the EVM in this case, but directly calling the EVM function gives the "continuous time", filtered constellation diagram, since I did not find a way to specify the baseband receiver filter.

I did not find a way to do this, so I added a downconverter and demodulator to my schematic and I did the baseband demodulation by using the square root cosine block in rfLib. But now, when I do an envlp analysis and save the baseband output waveform, it is constant and zero. I think this is because SpectreRF does not realise that the output signal is already a baseband signal, and it determines the envelope of something which is already the envelope; so it obtains 0. (When I do a normal transient analysis on the same schematic, the output waveform is correct. So I could save this output waveform and to the sampling and EVM determination in Matlab, but this is less convenient.).

I suspect that my last step is not necessary,  and that it is possible to define a '"communication standard" similar to the 802.11 standards which are already available in the EVM function, by providing the used transmit/receive pulse. Then SpectreRF directly knows how to demodulate the envelope and should output an EVM and constellation diagram as if an 802.11 standard was used.

How can I do this?

Greetings,

Thank you for your time,

Joris Lambrecht

hi all ,

i am new in verilog a , and i had a problem while i was trying  to simulate an ADPLL simulation with the pss analysis .

as you may know the "loop filer"  in adpll i implement with an integrator  on the phase, and since that i got an "hidden model" error .

i wonder if some of you can help me to fix my code, such that it will avoid form hidden model error ,or show me a better way to do it.

the error is on " accump1" which is important to me 

thanks everybody. 

my code:

 `include "constants.vams"

`include "disciplines.vams"

 module dig_loop(ick_refclk, i_pe_tdc, o_fine,);

  input                   ick_refclk;

  electrical              ick_refclk;

  input                   i_pe_tdc;                   // quantized Phase Error

  electrical              i_pe_tdc;                   // quantized Phase Error

  parameter real          pe_offset    = 0;         

  parameter real                  i_prop_coeff = 1;

  parameter real          i_int_coeff  = 1/16;

  parameter real          i_kpscale    = 1;

  parameter real          i_kiscale    = 1/16;

  parameter real          vccd         = 1.00;

 real              pe, pe_ki, pe_kp, p1, accum_p1, big_reg, fract_int;

  integer       i, fine_int_lim, fine_int, frac;

  real          kp_scale_int, ki_scale_int, clk_cnt;

analog begin

                @(initial_step)

                begin

                                accum_p1 = 64;

                                clk_cnt = 0;

                end

                pe = V(i_pe_tdc);

                ki_scale_int = (clk_cnt > 32) ? i_int_coeff : i_int_coeff + i_kiscale;

                kp_scale_int = (clk_cnt > 32) ? i_prop_coeff : i_prop_coeff + i_kpscale;

                pe_ki      = pe * ki_scale_int;

                p1         = pe_ki + accum_p1;

                pe_kp      = pe * kp_scale_int;

                big_reg    = ((pe_kp + p1)<0) ? 0 : (((pe_kp + p1)>(127.984375) ? 127.984375 :(pe_kp + p1)));

                fract_int  = $floor((big_reg-($floor(big_reg)))*64);

                fine_int   = $floor(big_reg);

                frac       = fract_int;

                @(cross(V(ick_refclk)-vccd/2,+1))

                begin

                                accum_p1 =  (p1 < 0) ? accum_p1 : ((p1 >= 128) ? accum_p1 : p1);

                                clk_cnt = clk_cnt + 1;

                $debug("At time %fpS:pe=%f, big_reg=%f, fine_int=%d,fract_int=%f p1=%f, pe_kp=%f, pe_ki=%f,kp_scale_int=%f " ,$abstime*1e12, pe, big_reg, fine_int,fract_int, p1, pe_kp, pe_ki,kp_scale_int);

                end

//***************************************************************************

//************************ OUTPUT ASSIGNMENT ********************************

//***************************************************************************

                V(o_fine) <+ transition(fine_int, 0, 20p, 20p, 20p);

end

endmodule

Hello,

I'm facing the following problem, when I try to run a transient simulation.

FATAL (CMI-2010): Assertion failed in file `bypassUtils.cc' at line 1977.

FATAL (SPECTRE-21): Assertion failed.

The only thing that I empirically know is that it's a  hierarchy problem: a block in my system causes this problem, but if I remove the block and I put exactly what is inside that block, the simulation can run.

I also couldn't find the file  `bypassUtils.cc'

Has anyone experienced this?

I work with Virtuoso 6.1.5-64b

Thanks

Hello, community

I would like to know if there's any document that concerns tips and hints on how to route RF CMOS circuits. Specifically, I'm looking for any type of document that teaches good practices when routing.

I'm using IBM's 130 nm process, CMOS transistors. Frequency is sub 10 GHz.

Thank you all and joyful celebrations.

Fávero

Kindly suggest me the proper way of determining W/L ratio of any rf cmos circuit...Is there any kind of rule to determine the optimum ratio(mathematically or practically)?

Hi,

if I run a psp-Analyses and plot "spm('psp 1 1)", this is plotted in a smith-chart. But if I plot "spm('psp 1 1)-spm('psp 2 1)-spm('psp 1 2)+spm('psp 2 2)" which is the differential-differential-S-parameter (Sdd), this is plotted in a rectangular chart. How can I plot such a sum/difference into a smith-chart? I want to add this expression into ADE GXL. IC 6.1.6.

Thank you and happy new year!

Magistus...

Hello! Faced with problem of LPF model. At pllmmlib it looks like a cell but how can i set it's parameters? Besides it has only two ports but LPF can have three ports what should i do in this case?

Thanks in advance!

BR,

Denis

Dear Friends,

I would like to extract a VCO layout, but I have a problem with Assura QRC.

I use: Cadence (IC6.1.5-64b.500.13), Spectre (12.1.1.164.isr15), Assura (4.1_USR1_HF13)

And this is Log file:

Cadence Extraction QRC - 64-bit Parasitic Extractor - Version 9.1.4-p003

Thu Sep 16 19:40:00 PDT 2010

----------------------------------------------------------------------------------------------------------

Copyright 2010 Cadence Design Systems, Inc.

INFO (EXTQRCXOPT-249) : For Assura inputs, if the "output_setup -directory_name" option was not

specified, it is automatically set to the input directory.

INFO (LBRCXU-108): Starting

/opt/assura//tools/assura/bin/rcxToDfII /home/testuser/cds/spice/SG13SLBE_09/work/testuser/cds/Assura/VCO24_23_full_cmim/__qrc.rcx_cmd -t -f /home/testuser/cds/spice/SG13SLBE_09/work/testuser/cds/Assura/VCO24_23_full_cmim/extview.tmp -w /home/testuser/cds/spice/SG13SLBE_09/work/testuser/cds/Assura/VCO24_23_full_cmim -cdslib /home/testuser/cds/spice/SG13SLBE_09/work/testuser/cds/cds.lib

Virtuoso Framework License (111) was checked out successfully. Total checkout time was 0.07s.

@(#)$CDS: rcxToDfII_64 version av4.1:Production:dfII6.1.3-64b:IC6.1.3-64b.500.15 10/08/2010 03:19 (sfrop004) $

sub-version 4.1_USR1_HF13, integ signature 2010-10-08-0235

run on master from /opt/assura/tools.lnx86/assura/bin/64bit/rcxToDfII on Mon Jan 12 12:18:12 2015

SG13S SiGe:C-BiCMOS Library, Init rev. 90401 (30.04.2009), GGa

InitAddons rev. 90401 (30.04.09), GGa

INFO (LBRCXU-114): Finished /opt/assura//tools/assura/bin/rcxToDfII

INFO (LBRCXM-642): Constructing the RCX run script

INFO (RCXSPIC-27050): Could not open file /home/testuser/cds/spice/SG13SLBE_09/work/testuser/cds/RCXspiceINIT for reading

ERROR (LBRCXM-644): Bad return status from RCX script generator. 0x100

INFO (LBRCXM-709): ***** QRC terminated abnormally *****

I will be thankful, if you have any idea about it.

Regards,

Shaa

I have simulated the conversion  gain of a mixer matched to 50 ohm at both input and output. Theoretically, voltage gain and power gain should be equal because both input and output are matched to 50 ohm.

The voltage gain has been simulated using pac and power gain using psp. The power gain is 4.2dB large than voltage gain. What is the cause of this discrepancy?

how to find tox and Cox parameters in dongbu 

1.For transient or any other long running simulations, how to ensure that simulation results are automatically saved on disk so that in event of program crash, one can resume with simulation upon next session ?

2.As far as layout and parasitic extraction is concerned , how is ADE-L different from ADE-XL and ADE-GXL ? Also, is there any documentation to understand the flow of virtuoso in terms of schematic design and layouts i.e. how cadence works ?

3.About gpdk_045 : there are two inductors - ind_a (asymmetrical) and ind_s (symmetrical).Is there a way to assign variable to inductor width or any other parameters to characterize it ? It seems that one cannot assign variable to any inductor parameters.

Thanks.

I want to pass a string parameter to a behavioural description.

In Spectre Veriloga, this works fine as follows:
  * in the veriloga view of 'block1', I include the line: parameter string string123 = "abcd";
  * in the schematic one level higher:  edit properties of 'block1' => set parameter 'string123' to 'StringParameter'
  * in the Spectre ADE viewEdit Variables => define a variable 'StringParameter' and set it to 'TheValueIWant'  (a text string without quotes).
  * As a result, variable 'StringParameter' is set to 'TheValueIWant' and this value is passed to parameter 'string123' of circuit 'block1'

As said, in spectre verilogA, this works fine.

But now, I want to do the same for a functional Verilog view in ams:
  * in the functional view of 'block1', I include line: parameter  string123 = "abcd";
  * in the schematic one level higher:  edit properties of 'block1' => set parameter 'string123' to 'StringParameter'
  * in the spectre ADE view: Edit Variables => define a variable 'StringParameter' and set it to 'TheValueIWant' (a text string without quotes).
 
Result: first, I get an error " undefined variable 'TheValueIWant' "
Then, I place the string 'TheValueIWant' between double quotes ("'TheValueIWant'")
But this does not work:  the parameter 'string123' gets the value 'StringParameter' (litterally, as a string) and not 'TheValueIWant'. 
In other words, the NAME of parameter 'string123' is passed to the Verilog description instead of its VALUE.

How can I solve this?

best regards,

Frank

Hi ,

I am trying to clip the calculator dft function output to extract dft peak value  in that frequency range. Is it possible ? If yes , how to go ahead with this .

How to get  y value at a particular frequency  in the dft plot in ocean?

Please advise.

Regards

Vishal

Upon running DRC on ind_a cell, I am getting a DRC error:

psubstrate_StampErrorFloat

Also, is there a way to sweep parameters like Inner Radius, Inductor Width, multiplier or Number of Turns for parametric simulations in ADE ?

Hi ,

I am trying to calculate phase noise at the output of an XOR gate. The XOR gate input are two quadrature clocks @ 500MHz and output is a 1GHz clock. I have some arbitrary noise spectral density ( phase noise ) assigned to the 500MHz clocks upto 500MHHz frequency offset from the carrier(500MHz in this case). I want to see the phase noise curve for the output of the XOR gate at 1GHz.

Please let me know if the following methodology is correct :

1) Shooting pss with beat frequency 500MHz, 10 harmonics , errpreset=moderate , tstab=100ns (circuit stabilizes pretty quickly)

2) pnoise setup : beat frequency = 500MHz (evaluated from the pss analysis); sweeptype = relative ; relative harmonic=2  ( 1GHz is second harmonic of 500MHz and is the output frequency of XOR gate); Input source= Voltage ( Arbitrary phase noise profile has been assigned to the source). Reference sideband = - 1 ( as 500MHz=1GHz-1*500MHz.).

Is the pnoise setup described above is correct ?

Is the same pnoise setup valid for any subharmonic injection locked system ?

Thanks & Regards

Vishal

Good day.

I am trying to simulate power supply noise propagation through an amplifier stage. The amplifier is driven by a large signal, which is the PSS beat. The circuit is slightly non-linear (THD around 30dB). I use harmonic balance for PSS engine. Now I add power supply interference (small signal); I try it in two different ways:

1) Run PAC analysis, with the only PAC source being power supply voltage source, look at the output spectrum (differential voltage).

2) Run PXF (differential voltage output) and look at the transfer function from the said power supply voltage source.

I deem the two analyses should have given same spectra, but they don't. In fact, the base harmonic (i.e. number "0") is exactly identical, all the others as not.

Can anyone please explain that to me?

UPD: I have tried to verify this with transient, i.e. ran a long TRAN simulation with both the input (LO) and the power supply (SUP) active; checked the output spectrum. Thus I validate a single frequency point of the SUP. It came out very close to PAC (and very far from PXF). So I better rephrase my question: where is my understanding of PXF went wrong? The image below shows these results. Peaks are come from the transient spectrum (1st harmonic). The brown and green curves are PAC results. The two remaining curves (flat ones) are PXF.

Many thanks,

Yevgeny.

Althought it seems like a licensing error, I really don't know what wxactly is the reason for that :

            Assura (tm) Physical Verification Version av4.1:Production:dfII6.1.3:IC6.1.3.500.10
            Release 4.1

Copyright (c) Cadence Design Systems. All rights reserved.
@(#)$CDS: assura version av4.1:Production:dfII6.1.3:IC6.1.3.500.10 06/09/2009 14:40 (sfrh259) $
sub-version 4.1, integ signature 2009-06-09-1330

run on [machine] from /apps/cadence/ASSURA41/tools.lnx86/assura/bin/32bit/assura on Wed Feb 18 23:05:00 2015

Checking out 1 license for Assura_RCX 3.10
ERROR (LMF-02096): License call failed for feature Assura_RCX, version 3.100 and quantity 1. The license server search path is defined as [license server location]. The FLEXnet error message is as follows,
    FLEXnet ERROR(-96, 0, 0): License server machine is down or not responding.

Run 'lic_error LMF-02096' for more information.
ERROR (LMF-02096): License call failed for feature Assura_RCX, version 3.100 and quantity 1. The license server search path is defined as [license server location]. The FLEXnet error message is as follows,
    FLEXnet ERROR(-96, 0, 0): License server machine is down or not responding.

Run 'lic_error LMF-02096' for more information.
ERROR (LMF-02096): License call failed for feature Virtuoso_QRC_Extraction_L, version 3.100 and quantity 1. The license server search path is defined as 5[license server location]. The FLEXnet error message is as follows,
    FLEXnet ERROR(-96, 0, 0): License server machine is down or not responding.

Run 'lic_error LMF-02096' for more information.
ERROR (LMF-02096): License call failed for feature Encounter_QRC_Extraction_L, version 3.100 and quantity 1. The license server search path is defined as [license server location]. The FLEXnet error message is as follows,
    FLEXnet ERROR(-96, 0, 0): License server machine is down or not responding.

Run 'lic_error LMF-02096' for more information.

Starting /apps/cadence/ASSURA41/tools/assura/bin/rcxToDfII /home/sh/shah6834/st50/rcx.test.rsf -t -cdslib /home/sh/shah6834/st50/cds.lib
@(#)$CDS: rcxToDfII version av4.1:Production:dfII6.1.3:IC6.1.3.500.10 06/09/2009 14:46 (sfrh259) $
sub-version 4.1, integ signature 2009-06-09-1330

run on [machine] from /apps/cadence/ASSURA41/tools.lnx86/assura/bin/32bit/rcxToDfII on Wed Feb 18 23:05:23 2015

*WARNING* Technology must be specified!
Loading gpdk045/libInit.il ...
    Loading gpdk045/loadCxt.ile ... done!
    Loading context 'gpdk045' from library 'gpdk045' ... done!
    Loading context 'pdkUtils' from library 'gpdk045' ... done!
    Loading gpdk045/gpdk045_customFilter.il ... done!
    Loading gpdk045/libInitCustomExit.il ...
    Loading Environment Settings ...
*WARNING* Cannot find /apps/cadence/ASSURA41/tools.lnx86/dfII/etc/tools/spectre directory to load environment variables
*WARNING* envSetVal: could not find tool[.partition] 'spectre.envOpts'
*WARNING* Cannot find /apps/cadence/ASSURA41/tools.lnx86/dfII/etc/tools/hspiceD directory to load environment variables

  *************************************************************           
  *              Cadence Design Systems, Inc.                 *           
  *                                                           *           
  *                    Generic 45nm PDK                       *           
  *                        (gpdk045)                          *           
  *                                                           *           
  *************************************************************           
    

    VERSION: 2.0

done!
Loaded gpdk045/libInit.il successfully!
*WARNING* envSetVal: could not find tool[.partition] 'hspiceD.envOpts'

Finished /apps/cadence/ASSURA41/tools/assura/bin/rcxToDfII

Starting /apps/cadence/ASSURA41/tools/assura/bin/avRCXxref /home/sh/shah6834/st50/rcx.test.rsf
@(#)$CDS: avRCXxref version av4.1:Production:dfII6.1.3:IC6.1.3.500.10 06/09/2009 14:41 (sfrh259) $
sub-version 4.1, integ signature 2009-06-09-1330
run on [machine] at Wed Feb 18 23:05:28 2015
Reading rsf

Finished /apps/cadence/ASSURA41/tools/assura/bin/avRCXxref
Constructing the RCX run script
Could not open file /home/sh/shah6834/st50/Dependencies/assura/RCXspiceINIT for reading
*WARNING* Bad return status from RCX script generator. 0x100