Quantcast
Channel: Cadence RF Design Forum
Viewing all 956 articles
Browse latest View live

Why the HB analysis PXF results are varying with TSTAB period (after sufficient steady state reach time)

$
0
0

Dear All,

I am running a ring-oscillator with almost sinusoidal voltage output. I am injecting the PAC current at certain point and seeing the PXF result  for the oscillator output voltage.

I see the oscillator reaches the steady state after 1 ns.

But, the PXF magnitudes for various sidebands are varying as I change the TSTAB from 2ns to 5 ns.

Can anybody please tell why it is doing so ?

Kind Regards,


channel length modulation slope

$
0
0

Hello i am trying to find the optimal length to have the most insignificant  channel length modulation effect.

i have managed to create  two vertical  markers  for all sweeps. is there a way to automatickly display the slope at each sweep step?

Thanks

How to append a plot from a .csv file on to an already WaveScan/ViVA plot

$
0
0

Dear All,

I have a .csv file with x column (1st column for x-axis values) and y column (2nd column for y-axis values).

I have plotted already a waveform in wavescan/Viva.

The .csv file is having same x and y units as that of wavescan/Viva.

Is there any way I can append the plot of the .csv file onto the wave in ViVA ?

Could anybody please help me in this regard.

Kind Regards.

Simulating INJECTION LOCKED OSCILLATOR outside the lock range

$
0
0

I have been trying to simulate injection locked oscillator using HB & HBnoise analysis to get the voltage spectrum & phase noise plot. The ILO is designed such that the current injection is done at the output node of the VCO. On trying to simulate it outside the lock range using HB analysis, HB still converges to the injection current frequency, & plase noise plot is also not satisfactory. With transient analysis, outside the locking range, phenomenon is easily observable, but to obtain phase noise plot using transient noise, I have to simulate for a very long time. 

How do I simulate the ILO outside lock range to get the pulled frequency & phase noise plot, using HB analysis?

Construct Explorer Expression to evaluate Y over reduced X range

$
0
0

Hello,

I am seeking for some help constructing expressions in ADE Explorer. Specifically, I am trying to set up output expressions to calculate specs so that they only apply over a reduced / specific X range so that I can properly construct my spec items where the spec target is dependent on what X range I am looking at. There are a number of cases where this might come up but for me the most common sort of example for me would be gain vs frequency where I might have a number of specifications of gain depending on whether this inband or out of band and different requirements at different out of band frequencies. I'd like to just run a single sp sim over a broad range of frequencies then the break out the specs rather than running a large number of sp sims This is Virtuoso IC6.1.7 

Thanks and Regards,

Matt

Can't compile ahdlcmi library

$
0
0

I am trying to use veriloga module in my simulation. But I met an error message ::

Compiling ahdlcmi module library.

Error found by spectre during AHDL read-in.
    ERROR (VACOMP-1008): Cannot compile ahdlcmi module library. Check the log file input.ahdlSimDB//3140_Cadence_workarea_testLib_and_gate_veriloga_veriloga.va.and_gate.ahdlcmi/Linux-64/../ahdlcmi.out for details. If the compiler ran out of memory, use 'setenv CDS_CMI_COMPLEVEL 0', and try again. Otherwise, contact your Cadence Customer Support representative with the netlist, log files, behavioral model files, and any other information that can help identify the problem.
    ERROR (SFE-91): Error when elaborating the instance and_gate. Simulation should be terminated.

Then I checked the ahdlcmi.out file and find it shows::

ld: cannot find -lc
collect2: ld returned 1 exit status
gnumake: *** [obj/optimize/5.0/and_gate_libahdlcmi.so] Error 1

But I have no idea what is that.

Thank you very much if anyone can help me with this. ~~

Attach parameter value to exported S2P file name

$
0
0

Hi, I wish to run a set a simulations in Maestro Assembler and to save their output in S2P format.

In the Spectre manual I found that I could use %P to attach the (univocal) process ID. It works but it is not very informative.

If possible I would rather use the swept variable value (e.g. the temperature).

Is there a way to achieve this?

Regards,

Dan

HBnoise Error

$
0
0

I am trying to run a HBnoise simulation after a 2 tone HB Analysis.Here is the HB Analysis setup 

The HBNoise setup looks like the following 

My goal is to measure the Noise Figure(NF) by considering the Input noise in 400 MHz -401 MHz band folding back to the 1 Hz-1 MHz band at the output.

However when I run the simulation,I get the following error message.

I have tried selecting several different reference side-bands from the list and each option leads to the same error.

I have also tried running a one tone HB analysis followed by a HBNoise simulation and I still get the same error.

I would appreciate any help on getting this resolved.

-Arnab


Does hbnoise support the ideal switch from analogLib?

$
0
0

I am running the circuit below and get the phase noise using pss/pnoise as well as hb/hbnoise. It is a frequency divider(divide-by-two) in which I used sample-and-hold circuits instead of latches to keep it "analog". pss/pnoise gives expected results whereas hb/hbnoise shows zero phase noise at the divided outputs ckI and ckQ. Is the switch not supported by hbnoise or could there be another problem? The log shows the following warning. The frequency in the warning is always the last point I specify for hbnoise.

Warning from spectre at freq = 10 MHz during HBNOISE analysis `hbnoise'.
    WARNING (SPECTRE-16518): Arithmetic exception in analysis `hbnoise' .

Schematic snapshot and netlist attached.

Virtuoso IC6.1.7-64b.500.3

Spectre Version 17.1.0.307.isr6 64bit -- 4 Jul 2018

Nagendra

How to reuse circuit INITIAL conditions (at simulation time t=0) at multiple instants during a single transient run

$
0
0

Dear All,

I want to inject a pulse current at certain node of a periodic circuit like Oscillator.

I need to check the oscillator's steady state phase shift if the pulse injection happens at different instants during one period of oscillation.

This can be done, by running multiple simulations ( basically a parametric sweep) with shifted instants of pulse injection.

But, running multiple simulations is very time consuming.

To speed up the simulation process, one can run the simulation at one go with reusing circuit INITIAL conditions (at simulation time t=0) at multiple instants. 

For example:- If total duration is 1000 ns, I can reuse the INITIAL condition at 200ns, 400ns, 600ns ... ... 800ns, The pulse injection can happen at 150ns, 460ns,670ns ..... 890ns (shift of 10nS from the previous instant).

Can anybody please tell how this can be achieved ?

Kind Regards,

Noise Analysis for Modulated Noise Using Verilog-A Modelling

$
0
0

Hi Community,

I am doing experiments about modulated flicker noise and I aim to stick to Verilog-A behavioural modelling.

Below is the test bench I brought up and the Verilog-A modules that I wrote seperately:


// VerilogA for lab_simu, noise_source, veriloga

`include "constants.vams"
`include "disciplines.vams"

module noise_source (op);

output op;
voltage op;

analog begin
V(op) <+ flicker_noise (1000,1,"Flicker") ;
end

endmodule


// VerilogA for lab_simu, Oscillator_fixed_freq, veriloga

`include "constants.vams"
`include "disciplines.vams"

module Oscillator_fixed_freq (out);

output out;
voltage out; // output signal

parameter real freq = 1e9 from (0:inf); // output frequency
parameter real vl= 0; // high output voltage
parameter real vh=1; // low output voltage
parameter real tt=0.01/ (1e9) from (0:inf); // transition time of output

integer n;
real next;

analog begin
@(initial_step) begin
next = 0.5/freq + $abstime;
end
@(timer(next)) begin
n = !n;
next = next + 0.5/freq;
end
V(out) <+ transition(n ? vh : vl, 0, tt);
end

endmodule


// VerilogA for lab_simu, mixer, veriloga

`include "constants.vams"
`include "disciplines.vams"

module mixer (vin1, vin2, vout);
input vin1, vin2;
output vout;
voltage vin1, vin2, vout;
parameter real gain = 1;

analog
V(vout) <+ gain * V(vin1)*V(vin2);

endmodule


Nothing terribly bizarre.

The question is, I would love to extract the Noise Power Spectral Density measured in V^2/Hz for both 'noise' and 'output':

when I set the noise analysis as below:

I get the plot expected (green curve is noise PSD and red line is that taken 10dB - a straight line!):

However, when I set the 'positive output node' in the noise analysis to be the modulated noise output, I got nothing in the plot (0V^2/Hz for the whole spectrum):

Could somebody explain why and suggest any solution to it? I want to plot the noise PSD of the output modulated noise.

In case noise analysis could not handle this task. Could somebody suggest in which analysis I can extract the same nice noise PSD plot as in the first case and how?

Thank you so much!!!

K Stability Factor Simulation Results Do not show up

$
0
0

Hi, 

I have designed an LNA and am going to check the k Stability factor. When I run the s-parameters I plot the k-stability factor, but nothing shows up and the screen is black and nothing is there. So, any suggestion how can I fix this issue? 

Regards,

Mehdi

plotting two op parameters simultaniosly

$
0
0

Hello , I am trying to plot simultaniosly rout and region op on the same plot.

A Ids rout,Ids region,(both as a function of vds) were created succsesfully, however when i do one plot and select append plot on ADEL and try to append region plot into it,it shows a flat region=0 (cuttof) plot.

Athough its not the situation as shown in the (Ids region only) plot shown bellow

when did i go ploting region and rout OP on the same plot?

Thanks 

test signal iprobe rout calculation

$
0
0

Hello , i am trying  to extract small signal Rout of a circuit with test source sweep.

For that i have defined and ac sweep of a test source on the output and to divide it by measured current in Iprobe.

i have done ac sweep for making   making other dc sources gnd leaving Vtest only active, as shown bellow.

However i got an   error as shown bellow,where i was wrong with my ac ,Vtest Iprobe method for finding rout?

Thanks.

"FATAL: The following branches form a loop of rigid branches (shorts) when added to the circuit:
V2:p (from net3 to 0)"

OP Rout Vds plot:

community.cadence.com/.../error2.txt

Modulated PXF results are confusing

$
0
0

I am trying to run modulated PXF to evaluate the supply sensitivity of a VCO. I went through the examples in the following documents:

- PSRR_Osc_AN

- Virtuoso Spectre Circuit Simulator and Accelerated Parallel Simulator Analysis User Guide (Version 15.1)

Below are the relevant snapshots of the simulation setup, direct plot form, and the AM to PM response from the tuning voltage source to the output.

The results are confusing:

[1] In direct plot form, the frequency ranges listed under USB do not make sense to me.

[2] The AM to PM plot plots both positive and negative frequencies, and that's partly why it looks weird. Is there a way to plot the response due to positive frequencies only? Modulated PXF options do not seem to have freqaxis setting.

I am running SPECTRE181


individual sweep for each simulation in ADEXL

$
0
0

Hello, I am trying to simulate two  types of sweep, Ids vs Vgs (vds sweep)

Ids vs Vds (vgs sweep).

I was able  to create one of them separatly by changing the global variables,As shown bellow .

However i cannot make a lsweep type list in the local variables of the simulation only on the global.

Instead of sweeping only 5 steps for each type of simulation (10 ittrerations)

When i put a range on both vgs and vds,it activates both simulations on every combination(25 itterations)

Is there a waythat we could do a condional parametric sweep?

for simulation 1 sweep only vgs,for simulation 2 sweep only vds . 

output resistance test vs I_out(Vout) test

$
0
0

Hello for a basic current mirror when we do an output current  characteristics then we  sweep test voltage source and measure mos drain current.

To calculate the incremental output resistance i saw  a remark that we need 1V DC bias to put into into Vdc source and Ac magnitude to make 1u.

I have three question for this situation:

1.what is the effect of connecting Voltage source in series with current source?

the current source will force a certain current , and the voltage source will force a voltage on the end of the current source?

2.when we are testing output current we put on the output DC voltage source and sweeping it measuring the current.

how adding another  test voltage source not interfering with the behavior of the circuit?

is there more passive way to measure the voltage and current on the output?

3.when measuring output resistance(output impedance) do we need to put 1V bias voltage in the Vdc source beyong the Vac 1uV amplitude?

or we could test impedance with AC magnitude only? 

Thanks

simultaneous bias on range of DC sweep

$
0
0

Hello, i  am trying to bias the mosfets to be region=2 on a range on Vtest values as shown in the  plot bellow.

I have defined DC sweep at ADEXL and made several parameters as shown bellow , i have defined global optimization, as shown in the end.I have here an optimization of DC sweep for several goals.

However there is "Learning process" in the optimization,it just following every combination of the parameters and not showing me any progress from which i can see that parameters needs to be increased in range so i will  get closer to the goal.

What could be done the see the "best combination among the ranges?

Thanks

The values of RD and RS in small-signal MOSFET model

$
0
0

Hello,

The following figure depicts the small-signal MOSFET mode of a transistor. Rd and Rs represent the ohmic resistance of the drain and source, respectively. It seems that they are only dependent on technology and the transistor's length and width. I used the ADE L in Virtuso to implement the simulation and printed the DC operating points of a transistor, but the values of Rd and Rs cannot be found in the result.

If Rd and Rs are in the result list, what are the name of them? 

If Rd and Rs are not in the result list, where can I find the exact values of them?

Thanks 

              

saturation state OP parameters dont match DC saturation formula

$
0
0

Hello i am trying ti match the following circuit.

When i looked at the parameters ,

region =2

beta=1.911*(10^-3)  ( miu_0*Cox )

vth=0.473

I_ds=101.64*(10^-6)

i put W=1u L=180n as transistor sizes.

But when i put them into the saturation state formula and tried to extract W which is in the formula  X=10^-6 it gave me X=8.95326×10^-8

I_ds=miu_0*Cox*(W/L)(Vgs-Vth)^2

101.64*(10^-6)=1.911*(10^-3)*(x/(180*(10^-9))*(0.8-0.473)^2

Where did i go wrong?

Thanks

Viewing all 956 articles
Browse latest View live